Computer systems may comprise platforms supporting heterogeneous processors such as a central processing unit (CPU) and a graphics processing unit (GPU) and symmetric and asymmetric processors. A single version of data may reside in a first memory associated with a first side (e.g., CPU) of a CPU-GPU platform. The second side (GPU side) may be enabled to invoke the single version data that reside in a first memory associated with the first side (CPU side) of the CPU-GPU platform. Also, the first side may not be enabled to invoke the single version data that resides in a second memory on the second side (GPU side). As the single version data may be stored in different address spaces, the existing communication mechanisms may merely allow one-way communication between the heterogeneous processors (CPU and the GPU) to invoke the single version data.